No, this is not listed as a remote opportunity.

Is there a hard deadline?

No — this opportunity has a rolling, ongoing application process with no fixed closing date.

💼internshipEuropeNewRolling

Intern — AI-Driven Flow Validation for Analog Design

Deadline: Rolling
Deadline type: Rolling
Region: Europe
Category: Internship
Eligibility: BS/MS/PhD student in mathematics, physics, computer science, or electrical/electronic engineering.
Remote: No
Last verified: Verified on 2026-07-12

💡 Apply AI to real EDA/analog chip-design workflows at a global leader in electronic design automation.

DeadlineRolling

No fixed closing date published. We show this as rolling and exclude it from countdown reminders.

Effortmedium

Eligibility summaryBS/MS/PhD student in mathematics, physics, computer science, or electrical/electronic engineering.

Last verified2026-07-12

CategoryInternship

RegionEurope

Description

Internship at Cadence, Feldkirchen (Munich). Apply AI-driven flow validation to analog IC design as part of Cadence's broader agentic-AI-for-chip-design push. Part of Cadence's recurring annual internship program.

Frequently asked questions

Who can apply?: BS/MS/PhD student in mathematics, physics, computer science, or electrical/electronic engineering.
Is this remote?: No, this is not listed as a remote opportunity.
Is there a hard deadline?: No — this opportunity has a rolling, ongoing application process with no fixed closing date.

Related opportunities

NAVER LABS Europe — LLM Research InternshipInternship · Europe
Machine Learning Internship — Iris.aiInternship · Europe
BCG X — Forward Deployed AI Scientist Internship (UK)Internship · Europe
IBM Research Europe — AI Internship (Zurich)Internship · Europe

🔍

Check your eligibility

Answer a few quick questions — nothing is saved, this just checks against this opportunity's stated criteria.

📬

Biweekly opportunity digest

This project is no longer being actively updated, so new subscriptions are currently closed. See /about for details.